搜尋職缺
Senior PDK Design Automation Engineer_技術開發部(新竹廠)
06/02更新
Senior PDK Design Automation Engineer_技術開發部(新竹廠)
盧森堡商達爾國際股份有限公司台灣分公司
本職缺「優先面試持有經濟部能力鑑定證書者」
雇用型態
全職
工作型態
無遠端工作
分類
工具機機械設計工程師、電路板製程工程師
分類
工具機機械設計工程師、電路板製程工程師
薪資範圍
面議 經常性薪資達 4 萬元或以上
工作地點
新竹市
需求人數
1人
職缺描述
Overview:
A senior PDK (Process Design Kit) Design Automation Engineer is a specialist in the semiconductor industry who develops, maintains, and automates IC design environments. This role ensures design teams can efficiently use EDA tools to create, verify, and manufacture chips aligned with specific foundry processes.
Key Responsibilities:
• PDK development and maintenance: Create, validate, and manage Process
Design Kits, including technology files, simulation models, and design rule
decks.
• Automating design workflows: Build scripts and tools to automate layout
generation, verification, and characterization.
• Develop parameterized device cells (p-cells): Create reusable, programmable
layout cells using scripting languages such as Cadence SKILL.
• Physical verification deck creation: Implement and maintain DRC/LVS rule decks
using tools like Cadence Pegasus, Siemens Calibre, or Synopsys ICV.
• EDA tool integration and support: Configure the EDA environment, manage tool
installations and licenses, and support design and layout engineers.
• Quality assurance: Develop and run automated regression tests to ensure PDK
and EDA environment accuracy.
• Collaboration: Work with process engineers, design teams, and EDA vendors
to resolve technical issues. Share experience and best practices with junior
design automation engineers.
• Documentation & Training: Prepare documentation and deliver training on
PDK usage and design flows.
Qualifications:
• PDK development: Experience in PDK development, including p-cells, design
rule decks (DRC/LVS), and extraction decks.
• EDA tools: Proficiency with industry-standard EDA tools from vendors like
Cadence (e.g., Virtuoso), Siemens (e.g., Calibre), or Synopsys.
• Scripting and programming: Strong programming and scripting skills are
essential.
• Semiconductor technology: Solid understanding of semiconductor physics,
CMOS fundamentals, and IC fabrication.
• Problem-solving: Strong troubleshooting and debugging skills for resolving
complex CAD and design issues.
• Effective communication and documentation, with experience preparing
technical reports and presenting to cross-functional teams.
• Proven collaboration in fast-paced technology environments, including
international and multidisciplinary teams.
• Willingness to mentor junior PDK engineers.
A senior PDK (Process Design Kit) Design Automation Engineer is a specialist in the semiconductor industry who develops, maintains, and automates IC design environments. This role ensures design teams can efficiently use EDA tools to create, verify, and manufacture chips aligned with specific foundry processes.
Key Responsibilities:
• PDK development and maintenance: Create, validate, and manage Process
Design Kits, including technology files, simulation models, and design rule
decks.
• Automating design workflows: Build scripts and tools to automate layout
generation, verification, and characterization.
• Develop parameterized device cells (p-cells): Create reusable, programmable
layout cells using scripting languages such as Cadence SKILL.
• Physical verification deck creation: Implement and maintain DRC/LVS rule decks
using tools like Cadence Pegasus, Siemens Calibre, or Synopsys ICV.
• EDA tool integration and support: Configure the EDA environment, manage tool
installations and licenses, and support design and layout engineers.
• Quality assurance: Develop and run automated regression tests to ensure PDK
and EDA environment accuracy.
• Collaboration: Work with process engineers, design teams, and EDA vendors
to resolve technical issues. Share experience and best practices with junior
design automation engineers.
• Documentation & Training: Prepare documentation and deliver training on
PDK usage and design flows.
Qualifications:
• PDK development: Experience in PDK development, including p-cells, design
rule decks (DRC/LVS), and extraction decks.
• EDA tools: Proficiency with industry-standard EDA tools from vendors like
Cadence (e.g., Virtuoso), Siemens (e.g., Calibre), or Synopsys.
• Scripting and programming: Strong programming and scripting skills are
essential.
• Semiconductor technology: Solid understanding of semiconductor physics,
CMOS fundamentals, and IC fabrication.
• Problem-solving: Strong troubleshooting and debugging skills for resolving
complex CAD and design issues.
• Effective communication and documentation, with experience preparing
technical reports and presenting to cross-functional teams.
• Proven collaboration in fast-paced technology environments, including
international and multidisciplinary teams.
• Willingness to mentor junior PDK engineers.
職務需求
工作經驗：10年以上
學歷限制：碩士
學歷限制：碩士
職位福利
休假制度：週休二日
企業資訊
企業名稱
盧森堡商達爾國際股份有限公司台灣分公司
公司地址
新北市新店區民權路50號7F
認同的鑑定項目
資訊安全工程師能力鑑定、電動車機電整合工程師能力鑑定、電磁相容工程師能力鑑定、電路板製程工程師能力鑑定
企業介紹
Diodes 公司 (Nasdaq：DIOD) 是標準普爾小型股 600 指數和羅素 3000 指數成員公司，為高品質應用特定標準產品全球製造商與供應商，產品涵蓋廣泛領域，包括分離、邏輯、類比及混合訊號半導體市場。Diodes 亦為汽車、工業、運算、消費性電子及通訊等市場提供服務。
Diodes 的產品包括二極體、整流器、電晶體、MOSFET、GPP橋、GPP整流器、保護裝置、特定功能陣列、單閘極邏輯、放大器與比較器、霍爾效應與溫度感測器、電源管理設備，包括AC-DC 轉換器與控制器、DC-DC 開關與線性穩壓器，以及電壓參考與LED驅動器；以及特殊功能裝置，例如 USB 電源開關、負載開關、電壓監控器及馬達控制器。Diodes 亦提供高速信號的定時、連接、開關與信號完整性解決方案。
Diodes 公司總部及美洲銷售辦公室位於美國德州普拉諾 (Plano) 與加州米爾皮塔斯 (Milpitas)。設計、行銷與工程中心位於普拉諾、米爾皮塔斯、臺北、桃園、新竹、上海、揚州、英國奧爾德姆及德國紐豪斯 。Diodes 的晶圓生產設施位於美國緬因州南波特蘭；英國格林諾克奧爾德姆；中國上海和無錫；還有基隆和新竹。Diodes 在中國上海、濟南、成都、無錫、中壢和基隆以及德國紐豪斯設有組裝與測試設施。另外在多個據點設有工程、銷售、倉儲及物流辦公室，包括臺北、香港、上海、深圳、武漢、揚州；英國奧爾德姆；南韓城南市以及德國慕尼克、法蘭克福，並於世界各地設有支持辦公室。
公司生產設施已通過國際公認標準ISO-9001:2015、ISO 14001:2015和IATF16949:2016的品質認證。
Diodes 公司目前擁有 C-TPAT 認證。
上述品質獎反映 Diodes 公司優異的品管技術，並進一步提升我們在重視品質與一致性的 OEM 業者心目中極佳廠商的地位。