Overview:
We are looking for a PDK (Process Design Kit) Design Automation Engineer who specializes in developing, maintaining, and automating the design environments for integrated circuit (IC) development. This role is crucial for enabling IC design teams to use Electronic Design Automation (EDA) software to create, verify, and manufacture chips based on specific foundry processes.

Key Responsibilities:
• PDK Development & Maintenance: Build and maintain Process Design Kits,
including technology files, simulation models, and design rule decks.
• Workflow Automation: Create scripts to streamline IC design processes such
as layout generation and verification.
• P-Cell Development: Develop parameterized device cells using scripting
languages (e.g., Cadence SKILL).
• Physical Verification: Implement and maintain DRC/LVS rule decks using
industry-standard tools.
• EDA Tool Support: Configure and manage EDA tools, licenses, and provide
technical support to design teams.
• Quality Assurance: Run automated regression tests to ensure PDK and design
flow integrity.
• Collaboration: Work with process engineers, design teams, and EDA vendors
to resolve technical issues.
• Documentation & Training: Prepare documentation and deliver training on
PDK usage and design flows.

Qualifications:
• 1-5 years of industry experience doing PDK development or design
automation work.
• Strong programming and scripting skills are essential. Common languages
include SKILL (Cadence Design Framework) Python, TCL, Perl.
• Proficiency with industry-standard EDA tools from vendors like Cadence (e.g.,
Virtuoso), Siemens (e.g., Calibre), or Synopsys.
• A solid understanding of semiconductor device physics, CMOS fundamentals,
and IC fabrication processes.

工作經驗：1年以上
學歷限制：大學

休假制度：週休二日